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ARCHITECTURE AND
PROGRAMMER’S MODEL OF AN 8086 MICROPROCESSOR

8086 microprocessor is the successor of
8085 microprocessor. It was released in 1978 by Intel. It is a 16-bit
microprocessor and it is also known by the name of iAPX 86. It has:

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·        
16
Data Lines

·        
20
Address Lines

·        
14,
16-bit registers

·        
Has
a multiplexed Address and Data Bus

And can provide a maximum storage of up
to 1MB. It also has a powerful instruction set which helps doing multiplication
and division very easily. It has a pipelined architecture unlike it’s
predecessors which helps in faster and more suitable way for execution of
processes/instructions.

 

8086
Architecture

The 8086 processor I divided into 2
blocks:

·        
Bus
Interface Unit(BIU)

·        
Execution
Unit(EU)

These two are also called as the
Functional Units of 8086.

 

 

Bus
Interface Unit: It handles all the transactions of data and
addresses on the buses for EU. It performs all operations like instruction
fetching, writing and reading of operands for memory and calculating addresses
of memory operands. It reads and writes data to and from ports as well as
memory. It generates the Physical Address of 20-bit and acts as an interface
for the External Memory. For faster execution it fetches 6 bytes of the next
instruction previously during execution of another instruction (Pipelining) and
stores it in the Instruction Queue, this saves a lot of time and makes optimal
use of processing time. The 20-bit Physical Address is generated by combining
16-bit Segment Address with a 16-bit Offset Address. It also has 4 Segment
Registers:

·        
Code Segment(CS)-Used for addressing the memory location
in code segment of a memory, where the executable program is stored.

·        
Data Segment(DS)-It
stores data (variables, etc.) used in the program. It can be accessed by the
offset address.

·        
Stack Segment(SS)-It handles memory to store data and
addresses during the execution of the program

·        
Extra Segment(ES)-It stores the additional data or
destination data. It’s used when data segment is full.

The BIU also has an Instruction
Pointer(IP) which is a 16-bit register holding the next instruction to be
executed.

 

Execution
Unit: It’s
main job is to decode and execute instructions. It also tells the BIU where to
fetch the instructions or data. It consists of the ALU(Arithmetic Logic Unit)
which does all arithmetic and logical operations. It has 4 general purpose
registers:

·        
AX Register- It is the accumulator to store operands for
arithmetic operations

·        
BX Register- Base register, stores base location of starting of
a data segment

·        
CX Register- Counter, stores loop instruction in a counter.

·        
DX Register-It contains I/O port addresses for I/O instructions

There is also a Stack Pointer Register
which holds
the address from the start of the segment to the memory location, where the
most recently used word was stored on the stack.

There is also a Flag Register which is
16-bit out of which 9 are active flags and the rest are user-defined flags.
This flag register works like a flip-flop as it changes status according to
value stored in the accumulator. Out of those 9, there are 6 Status Flags and 3
Control Flags.

·        
Control Flags:

Ø 
Trap Flag(TF)-It is used for stepwise execution while
debugging of a program.

Ø 
Interrupt Flag(IF)- When it is enabled interrupts arising
are processed if it’s disabled then be it any interrupt it is not bothered by
the processor.

Ø 
Direction Flag(DF)-This flag is used in String operations
and arrays to point to locations and to move to higher or lower memory
locations.

·        
Status Flags:

Ø 
Carry Flag(CF)-It indicates a carry or a borrow for arithmetic
operations.

Ø 
Overflow Flag(OF)- It indicates a shortage of memory to
display the result.

Ø 
Zero Flag(ZF)-It displays 1 whenever the result of an
arithmetic operation is zero(0).

Ø 
Sign Flag(SF)-If the result of the arithmetic
operation is negative then the SF is set to 1, else it is 0.

Ø 
Auxiliary Flag(AF)-If there is an intermediate carry or
borrow generated during the execution, this flag is set to 1.

Ø 
Parity Flag(PF)-Indicates the parity of the result or
the data for correctness of the same. 1(set) when even parity and 0(reset) when
odd parity.

 

Pin
Diagram of an 8086 Microprocessor:

 

 

 

 

 

Programmer’s
Model of 8086 Microprocessor

During the execution of application
programming, registers are used and instructions specify the execution, hence
the Programmer’s Model of 8086 microprocessor is said to be program visible.

It contains 8, 16 and 32-bit registers.
The 8-bit registers AL, BL, CL, DL, AH, BH, CH, DH are combined to make the
16-bit general purpose registers: AX, BX, CX, DX. Other 16-bit registers are SP,
BP, DI, SI, IP, Flag Register, CS, DS, ES and SS. Other registers are program
invisible and cannot be addressed directly during application programming.

 

AX, BX, CX, DX are the data or general
purpose registers. SI, BP, DI, SP and IP are the Pointer and Index Registers
and CS, DS, ES and SS are the segment registers.

Flag register gives us the program
status also called as the program status word(PSW) which can tell the status as
well as help in control in the program.

 

Physical Address is calculated using the
Segment Pointer which gives us the Segment Address along with the Offset
Address which gives us the Effective Address.

 

Example: CS=123A

IP=341B

 

341B               Offset

+       
123A0               Segment Address

=       
157BB              Physical Address

 

Program Memory Models

·        
Tiny
: shared for segments shared for code, data and stack

·        
Small:
 single statement for code, separate
statement shared by data and stack.

·        
Multiple:
Multiple segments for code, separate single statement shared for data and stack

·        
Compact:
single statement for code, separate multiple statement for data and stack

·        
Large:
Multiple segments for code, data and stackARCHITECTURE AND
PROGRAMMER’S MODEL OF AN 8086 MICROPROCESSOR

8086 microprocessor is the successor of
8085 microprocessor. It was released in 1978 by Intel. It is a 16-bit
microprocessor and it is also known by the name of iAPX 86. It has:

·        
16
Data Lines

·        
20
Address Lines

·        
14,
16-bit registers

·        
Has
a multiplexed Address and Data Bus

And can provide a maximum storage of up
to 1MB. It also has a powerful instruction set which helps doing multiplication
and division very easily. It has a pipelined architecture unlike it’s
predecessors which helps in faster and more suitable way for execution of
processes/instructions.

 

8086
Architecture

The 8086 processor I divided into 2
blocks:

·        
Bus
Interface Unit(BIU)

·        
Execution
Unit(EU)

These two are also called as the
Functional Units of 8086.

 

 

Bus
Interface Unit: It handles all the transactions of data and
addresses on the buses for EU. It performs all operations like instruction
fetching, writing and reading of operands for memory and calculating addresses
of memory operands. It reads and writes data to and from ports as well as
memory. It generates the Physical Address of 20-bit and acts as an interface
for the External Memory. For faster execution it fetches 6 bytes of the next
instruction previously during execution of another instruction (Pipelining) and
stores it in the Instruction Queue, this saves a lot of time and makes optimal
use of processing time. The 20-bit Physical Address is generated by combining
16-bit Segment Address with a 16-bit Offset Address. It also has 4 Segment
Registers:

·        
Code Segment(CS)-Used for addressing the memory location
in code segment of a memory, where the executable program is stored.

·        
Data Segment(DS)-It
stores data (variables, etc.) used in the program. It can be accessed by the
offset address.

·        
Stack Segment(SS)-It handles memory to store data and
addresses during the execution of the program

·        
Extra Segment(ES)-It stores the additional data or
destination data. It’s used when data segment is full.

The BIU also has an Instruction
Pointer(IP) which is a 16-bit register holding the next instruction to be
executed.

 

Execution
Unit: It’s
main job is to decode and execute instructions. It also tells the BIU where to
fetch the instructions or data. It consists of the ALU(Arithmetic Logic Unit)
which does all arithmetic and logical operations. It has 4 general purpose
registers:

·        
AX Register- It is the accumulator to store operands for
arithmetic operations

·        
BX Register- Base register, stores base location of starting of
a data segment

·        
CX Register- Counter, stores loop instruction in a counter.

·        
DX Register-It contains I/O port addresses for I/O instructions

There is also a Stack Pointer Register
which holds
the address from the start of the segment to the memory location, where the
most recently used word was stored on the stack.

There is also a Flag Register which is
16-bit out of which 9 are active flags and the rest are user-defined flags.
This flag register works like a flip-flop as it changes status according to
value stored in the accumulator. Out of those 9, there are 6 Status Flags and 3
Control Flags.

·        
Control Flags:

Ø 
Trap Flag(TF)-It is used for stepwise execution while
debugging of a program.

Ø 
Interrupt Flag(IF)- When it is enabled interrupts arising
are processed if it’s disabled then be it any interrupt it is not bothered by
the processor.

Ø 
Direction Flag(DF)-This flag is used in String operations
and arrays to point to locations and to move to higher or lower memory
locations.

·        
Status Flags:

Ø 
Carry Flag(CF)-It indicates a carry or a borrow for arithmetic
operations.

Ø 
Overflow Flag(OF)- It indicates a shortage of memory to
display the result.

Ø 
Zero Flag(ZF)-It displays 1 whenever the result of an
arithmetic operation is zero(0).

Ø 
Sign Flag(SF)-If the result of the arithmetic
operation is negative then the SF is set to 1, else it is 0.

Ø 
Auxiliary Flag(AF)-If there is an intermediate carry or
borrow generated during the execution, this flag is set to 1.

Ø 
Parity Flag(PF)-Indicates the parity of the result or
the data for correctness of the same. 1(set) when even parity and 0(reset) when
odd parity.

 

Pin
Diagram of an 8086 Microprocessor:

 

 

 

 

 

Programmer’s
Model of 8086 Microprocessor

During the execution of application
programming, registers are used and instructions specify the execution, hence
the Programmer’s Model of 8086 microprocessor is said to be program visible.

It contains 8, 16 and 32-bit registers.
The 8-bit registers AL, BL, CL, DL, AH, BH, CH, DH are combined to make the
16-bit general purpose registers: AX, BX, CX, DX. Other 16-bit registers are SP,
BP, DI, SI, IP, Flag Register, CS, DS, ES and SS. Other registers are program
invisible and cannot be addressed directly during application programming.

 

AX, BX, CX, DX are the data or general
purpose registers. SI, BP, DI, SP and IP are the Pointer and Index Registers
and CS, DS, ES and SS are the segment registers.

Flag register gives us the program
status also called as the program status word(PSW) which can tell the status as
well as help in control in the program.

 

Physical Address is calculated using the
Segment Pointer which gives us the Segment Address along with the Offset
Address which gives us the Effective Address.

 

Example: CS=123A

IP=341B

 

341B               Offset

+       
123A0               Segment Address

=       
157BB              Physical Address

 

Program Memory Models

·        
Tiny
: shared for segments shared for code, data and stack

·        
Small:
 single statement for code, separate
statement shared by data and stack.

·        
Multiple:
Multiple segments for code, separate single statement shared for data and stack

·        
Compact:
single statement for code, separate multiple statement for data and stack

·        
Large:
Multiple segments for code, data and stack

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